1. Field of the Invention
This invention relates to methods and apparatus for suppressing transient voltages and current spikes on high speed transmission lines for the purpose of protecting electronic equipment.
2. Description of the Prior Art
Prior art systems for protecting electrical equipment from the damaging effects of voltage transients and current spikes associated with energy surges are well known. Such systems have included the use of gas dissipating tubes, semiconductor devices, or some combination thereof.
Gas dissipating tubes, or spark gaps, dissipate energy by producing an electrical arcing to ground. This arcing occurs through the ionization of a gas of known dielectric strength during an electrical surge condition.
While gas dissipating tubes provide sufficient suppression for most energy surges, their relatively slow response time results in a failure to suppress fast rise time voltage transients and current spikes. Such transients and spikes are capable of destroying electrical equipment connected to the electrical line upon which the voltage transients and current spikes are induced.
FIG. 1 shows a conventional surge protector which employs a gas dissipating tube 2 connected between two electrical transmission lines 4, 6, which lines carry signals to electronic equipment, such as computer or telephony equipment, connected thereto. In telephone systems, transmission lines 4, 6 may be a tip and ring line, respectively.
FIG. 3 is a graph of voltage from one electrical line 4, 6 to ground versus time after a first pulse is introduced to one electrical line 4, 6 of the circuit in FIG. 1. The first pulse ramps up to its maximum voltage of 5 kV (kilovolts) in 10 xcexcs (microseconds) and decays to one-half the maximum voltage in 700 xcexcs. This first pulse will be referred to as a 10/700 pulse.
As the first pulse ramps up, the voltage across the gas tube increases. As a result, the gas tube begins to charge. When the gas tube is fully charged, the gas in the gas tube will ionize and the pulse will be dissipated. In FIG. 3, the gas is shown to have ionized at 298V. The ionization occurred 2.6 xcexcs is after the pulse was introduced.
FIG. 4 is a graph of voltage from one electrical line 4, 6 to ground versus time after a second pulse was introduced to one electrical line 4, 6 of the circuit in FIG. 1. The second pulse ramps up to its maximum voltage of 4 kV in 5 ns (nanoseconds) and decays to one-half the maximum voltage in 50 ns. This second pulse will be referred to as a 5/50 pulse.
The circuit operates in the same manner as when the 10/700 pulse was introduced. Since the 5/50 pulse has a faster rise time than the 10/700 pulse, however, the voltage spikes up to 2.96 kV before the gas in the gas tube ionizes. Moreover, after firing, the gas tube does not clamp the voltage low enough to protect the electronic equipment. The voltage rises to above 1 kV several times during the duration of the 5/50 pulse and only begins to drop off after the pulse has finished.
The response time of semiconductor-type surge suppressors is faster than that of gas dissipating tubes. The typical avalanche semiconductor device used, however, is limited in the level of energy which it can dissipate before being destroyed by the electrical surge. Further, these devices add significant levels of capacitance to the surge protection circuit. Typical gas tubes have capacitances of between about 2 pF (picofarads) and about 7 pF. The semiconductor circuits used in conjunction with the gas tubes, however, increase the capacitance of the conventional surge protector circuit to about 100 pF. The problem with such relatively high capacitance is that it limits the bandwidth and, therefore, the signal transmission rate of the transmission line to which the surge protector is connected.
Examples of such prior art designs include arrangements of gas dissipating tubes in combination with Zener diodes or some other semiconductor device with similar clamping characteristics. Typically, these circuits include additional elements which introduce added capacitance or inductance to the circuit.
Another conventional surge protector is shown in FIG. 2. It includes a gas dissipating tube 2 connected across electrical lines 4, 6 and two avalanche semiconductors. One avalanche semiconductor 8 is connected between electrical line 4 and ground and the other avalanche semiconductor 10 is connected between electrical line 6 and ground.
FIG. 5 is a graph of voltage from one electrical line 4, 6 to ground versus time after a 10/700 pulse is introduced to one electrical line 4, 6 of the circuit in FIG. 2.
As the 10/700 pulse ramps up, the voltage across the gas tube increases. As a result, the gas tube begins to charge. When the voltage across the gas tube reaches the breakdown voltage of the avalanche semiconductor, the avalanche semiconductor sinks current and clamps the voltage across the gas tube at the avalanche semiconductor""s breakdown voltage, thereby, protecting the attached electronic equipment.
In FIG. 5, the avalanche semiconductor began sinking current when the voltage across the gas tube reached 222V. The 222V level was reached 2 xcexcs after the 10/700 pulse was introduced to the electrical line. The voltage across the gas tube is then clamped at 222V by the avalanche semiconductor. After the avalanche semiconductor clamps the voltage, the gas tube will continue to charge until the gas in the gas tube ionizes and dissipates the pulse. FIG. 5 shows the gas ionized 3.2 xcexcs after the pulse was introduced on the line.
FIG. 6 is a graph of voltage from one electrical line 4, 6 to ground versus time after a 5/50 pulse is introduced to either electrical line 4, 6 of the circuit in FIG. 2. The circuit operates in the same manner as when the 10/700 pulse was introduced. The faster rise time of the 5/50 pulse, however, results in a voltage spike of 360V before the avalanche semiconductor begins clamping the voltage. Once the avalanche semiconductor starts to sink current and clamp the voltage, the voltage drops to less than 250V within 22 ns of the pulse being introduced to the line.
A further example of a surge protector is disclosed in U.S. Pat. No. 4,683,514 to Cook. The Cook patent discloses the use of a spark gap disposed across an electrical line and in parallel with an avalanche semiconductor device. An energy surge induced on the electrical line will cause the semiconductor circuit to clamp the transient at the breakdown voltage of the semiconductor device and will cause the spark gap to fire within a specified time period. The addition of the avalanche semiconductor device adds a significant capacitance to the electrical line, thus degrading higher frequency signals carried by the line.
It is an object of the present invention to provide an improved electrical line surge protector which can be used to protect electronic equipment from energy surges including normal and fast rise time voltage transients and current spikes induced by lightning and electromagnetic pulses without loading down the circuit with increased capacitance.
It is a further object of the present invention to provide a surge protector with nearly identical levels of capacitance from line-to-line and line-to-ground in a balanced circuit arrangement.
It is an even further object of the present invention to provide a method of reducing the capacitance of a surge protector to enable electronic equipment to be protected and at the same time allow high speed data transmission.
The low capacitance surge protector is comprised of a gas tube, a first avalanche semiconductor, and at least a first parallel arrangement of diodes connected in series with the first avalanche semiconductor. The at least first parallel arrangement of diodes and first avalanche semiconductor forming a first series arrangement of components. The first series arrangement is connected between a first conductor (e.g., a tip line in a telephone system) and ground. The at least first parallel arrangement of diodes includes at least one pair of diodes. The diodes of the at least one pair of diodes are coupled together in opposite polarity.
A second embodiment includes at least a second parallel arrangement of diodes (connected in opposite polarity to each other) connected in series with a second avalanche semiconductor. The at least second parallel arrangement of diodes and second avalanche semiconductor forming a second series arrangement of components. The second series arrangement of componenets is connected between ground and a second conductor (e.g., a ring line in a telephone system).
The parallel arrangements of diodes are placed in series with the avalanche semiconductors to effectively reduce the overall capacitance of the surge protector measured from line-to-line or from line-to-ground.
In a third embodiment each one of the first series arrangement of components and second series arrangement of components includes two parallel arrangements of diodes (the diodes in each parallel arrangement being connected in opposite polarity) in series with each of the avalanche semiconductors. The additional parallel arrangments of diodes further reduce the capacitance of the surge protector from line-to-line and line-to-ground.
In a preferred embodiment, a three element gas tube includes a first element, a second element, and a ground element. The first element is connected to the line 4, the second element is connected to the line 6, and the ground element is connected to ground. A first pair of diodes which are interconnected in series cathode to cathode are connected between the line 4 and the line 6. A second pair of diodes which are interconnected in series anode to anode are connected between the line 4 and the line 6. The interconnected cathodes of the first series arrangement of diodes is connected to one end of a first avalanche semiconductor, whose other end is connected to the anode of a fifth diode. The cathode of the fifth diode is grounded. Alternatively, the interconnected cathodes may be connected to the anode of the fifth diode, whose cathode is connected to one end of the first avalanche semiconductor, which in this case, the second end of the first avalanche semiconductor is grounded. The interconnected anodes of the second series arrangement of diodes is connected to one end of a second avalanche semiconductor, whose other end is connected to the cathode of a sixth diode. The anode of the sixth diode is grounded. Alternatively, the interconnected anodes may be connected to the cathode of the sixth diode, whose anode is connected to one end of the second avalanche semiconductor, which in this case, the second end of the second avalanche semiconductor is grounded.
The present invention also includes a method of reducing the capacitance of a surge protector circuit having a gas discharge tube and an avalanche semiconductor coupled in parallel with the gas discharge tube. The gas discharge tube and avalanche semiconductor are electrically coupled between an electrical line and ground. The avalanche semiconductor is electrically connected in series with at least one parallel arrangement of diodes. Each parallel arrangement of diodes includes a pair of diodes which are coupled in opposite polarity to each other. The pair of diodes have a total capacitance associated therewith. The avalanche semiconductor also has a capacitance associated therewith. The parallel arrangement of diodes and the avalanche semiconductor are electrically coupled in series which causes the total capacitance of the parallel arrangement of diodes and capacitance of the avalanche semiconductor to combine in series. The result is a reduced total capacitance of the surge protector between the electrical line and ground. Preferably, each of the diodes of the pair of diodes in the method of reducing the capacitance of a protection circuit are fast recovery diodes. A similar arrangement of diodes and an avalanche semiconductor can be coupled between a second electrical line and ground to reduce the capacitance of the protection circuit between the second electrical line and ground.
These and other objects, features, and advantages of the present invention will be apparent from the following detailed description of illustrative embodiments thereof, which are to be read in connection with the accompanying drawings.